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MecaTroniX
Home
Contact
Sources
Tuto
Brief
Module, assembly & architecture
Scope
Step 0 : MODULES
0a : Execution of a module
0a : Execution of a module
0b : Calibration of a module
0b : Insert a module
0c : Insert a module
0d : Make evolutions
0e : Change module version
0f : Make evolutions from a Simulink model
0g : 'Go To' module functionality
0h : Modules removal & Sort functionality
0i : Modules copy
0j : Validity of a module
step-0b-calibration-of-a-module
step-0b-calibration-of-a-module
Step 1 : ASSEMBLY
1a : Fill an assembly with the Source Modules
1b : Fill an assembly with the Source Models
1c : Remove modules from the assembly with the Source Models
1d : Copying modules from an assembly to a Simulink model
1e : Synchronizing an assembly with its attached assembly
1f : Impact of copying modules on assemblies
Step 2 : AUTO assembly upon empty archi
2a : Auto assembly upon an empty architecture
2b : Redundant signals
2c : Invalid function-call connection
2d : Use of 1 assembly in the initial Simulink model
2e : Use of 3 assemblies in the initial Simulink model
2f : Towards not empty architecture
Step 3 : AUTO ASSEMBLY upon not empty architecture
3a : Redesigning architecture 1
3b : Redesigning architecture 2
3c : Attach a configuration
3d : About the assemble process
3e : 'Go To' functionality with an assembly
3f : Signals Explorer functionality
Step 4 : slTOOL Simulink Tool
4a : Align selected blocks
4b : Associate blocks
4c : Disconnect blocks
4d : Organize Simulink system
4e : Organize with 'lines' option
Step 5 : ARCHITECTURES design
5a : Defining Sample Time in the architecture
5b : Conditions for a valid architecture
Step 6 : COMMUNITY functionalities
6a : Export modules
6b : Import modules
6c : Capitalization process
6d : Synchronization process
6e : with several servers
6f : Sort functionality
6g : Other effects of capitalization
Step 7 : OPTIONS
7a : nbCapiShown
7b : defaultSt
7c : inheritSampleTime
7d : connectionTypeForAblIn/Outputs
7e : insertRT
7f : insertUD
7g : frNameStartWith, goNameStartWith, rtNameStartWith
7h : defaultTrigger, defaultMask
7i : getSignalFromOutside
MecaTroniX
Home
Contact
Sources
Tuto
Brief
Module, assembly & architecture
Scope
Step 0 : MODULES
0a : Execution of a module
0a : Execution of a module
0b : Calibration of a module
0b : Insert a module
0c : Insert a module
0d : Make evolutions
0e : Change module version
0f : Make evolutions from a Simulink model
0g : 'Go To' module functionality
0h : Modules removal & Sort functionality
0i : Modules copy
0j : Validity of a module
step-0b-calibration-of-a-module
step-0b-calibration-of-a-module
Step 1 : ASSEMBLY
1a : Fill an assembly with the Source Modules
1b : Fill an assembly with the Source Models
1c : Remove modules from the assembly with the Source Models
1d : Copying modules from an assembly to a Simulink model
1e : Synchronizing an assembly with its attached assembly
1f : Impact of copying modules on assemblies
Step 2 : AUTO assembly upon empty archi
2a : Auto assembly upon an empty architecture
2b : Redundant signals
2c : Invalid function-call connection
2d : Use of 1 assembly in the initial Simulink model
2e : Use of 3 assemblies in the initial Simulink model
2f : Towards not empty architecture
Step 3 : AUTO ASSEMBLY upon not empty architecture
3a : Redesigning architecture 1
3b : Redesigning architecture 2
3c : Attach a configuration
3d : About the assemble process
3e : 'Go To' functionality with an assembly
3f : Signals Explorer functionality
Step 4 : slTOOL Simulink Tool
4a : Align selected blocks
4b : Associate blocks
4c : Disconnect blocks
4d : Organize Simulink system
4e : Organize with 'lines' option
Step 5 : ARCHITECTURES design
5a : Defining Sample Time in the architecture
5b : Conditions for a valid architecture
Step 6 : COMMUNITY functionalities
6a : Export modules
6b : Import modules
6c : Capitalization process
6d : Synchronization process
6e : with several servers
6f : Sort functionality
6g : Other effects of capitalization
Step 7 : OPTIONS
7a : nbCapiShown
7b : defaultSt
7c : inheritSampleTime
7d : connectionTypeForAblIn/Outputs
7e : insertRT
7f : insertUD
7g : frNameStartWith, goNameStartWith, rtNameStartWith
7h : defaultTrigger, defaultMask
7i : getSignalFromOutside
More
Home
Contact
Sources
Tuto
Brief
Module, assembly & architecture
Scope
Step 0 : MODULES
0a : Execution of a module
0a : Execution of a module
0b : Calibration of a module
0b : Insert a module
0c : Insert a module
0d : Make evolutions
0e : Change module version
0f : Make evolutions from a Simulink model
0g : 'Go To' module functionality
0h : Modules removal & Sort functionality
0i : Modules copy
0j : Validity of a module
step-0b-calibration-of-a-module
step-0b-calibration-of-a-module
Step 1 : ASSEMBLY
1a : Fill an assembly with the Source Modules
1b : Fill an assembly with the Source Models
1c : Remove modules from the assembly with the Source Models
1d : Copying modules from an assembly to a Simulink model
1e : Synchronizing an assembly with its attached assembly
1f : Impact of copying modules on assemblies
Step 2 : AUTO assembly upon empty archi
2a : Auto assembly upon an empty architecture
2b : Redundant signals
2c : Invalid function-call connection
2d : Use of 1 assembly in the initial Simulink model
2e : Use of 3 assemblies in the initial Simulink model
2f : Towards not empty architecture
Step 3 : AUTO ASSEMBLY upon not empty architecture
3a : Redesigning architecture 1
3b : Redesigning architecture 2
3c : Attach a configuration
3d : About the assemble process
3e : 'Go To' functionality with an assembly
3f : Signals Explorer functionality
Step 4 : slTOOL Simulink Tool
4a : Align selected blocks
4b : Associate blocks
4c : Disconnect blocks
4d : Organize Simulink system
4e : Organize with 'lines' option
Step 5 : ARCHITECTURES design
5a : Defining Sample Time in the architecture
5b : Conditions for a valid architecture
Step 6 : COMMUNITY functionalities
6a : Export modules
6b : Import modules
6c : Capitalization process
6d : Synchronization process
6e : with several servers
6f : Sort functionality
6g : Other effects of capitalization
Step 7 : OPTIONS
7a : nbCapiShown
7b : defaultSt
7c : inheritSampleTime
7d : connectionTypeForAblIn/Outputs
7e : insertRT
7f : insertUD
7g : frNameStartWith, goNameStartWith, rtNameStartWith
7h : defaultTrigger, defaultMask
7i : getSignalFromOutside
Brief
Brief presentation of MecaTroniX tool and training
Published with MATLAB® R2013a
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