This step is also demoed with this video :

(ongoing...)

Step 2c : Invalid function-call connection

According to configurations, modules may then be connected one with the other running at different rates.

As explained in step 2a and 7e (about options), rate transition block handles this in most cases.

Nevertheless, there is still a configuration leading to the 'Invalid function-called connection' situation,

that may be handled by a rate transition in itself but is unsufficient in some cases. This is what is explained here.

As an example, let's consider the assembly abl_training_vU12 having these two modules :

1. ana_signal3_vU0

2. ana_signal4_vU0

By creating the auto assembly upon its attached architecture archi_empty_vU0, one can get :

We can observe that both modules ana_signal3_vU0 and ana_signal4_vU0 are connected through signals ana_signal3 and ana_signal4 :

The way Simulink behaves on this situation depends on the Invalid function-call connection set :

The defaut setting of this option is error, accordingly to the Simlulink tip :

• Setting this parameter to none or warning can lead to invalid simulation results

• Setting this parameter to none or warning may cause Simulink software to insert extra delay operations

As a result, MecaTroniX assume the error setting.

If we update the previous model by Ctr+D, one can observe there is no Simulink error, despite the error setting in such a situation. Why?

This is due to one of the two rate transitions, which behaves in this situation like a unit delay :

Remark : when the rate transition blocks are big enough, they automatically change their display according to the way they behave.

This has the effect to break the loop, as recommended by Simulink documentation.

Indeed, if the insertRT option is set to 0 (cf. step 2b and 7e) :

and auto assemble again, one can get :

according to the insertRT option set to 0, there is no rate transiton block. Then, if the model is updated using Ctrl+D, the Simulink error happens :

We can see the benefits of rate transition block on the 'Invalid function-call connection'.

But as said previously, there is still one case which is not managed by only rate transition block.

To illustrate this, set the insertRT option back to 1, and change the sample time of module ana_signal4_vU0 to 0.010 :

By assembling again, model becomes :

Updating this model by Ctrl+D leads to the Simulink error :

Indeed, previous rate transition block behaved like a unit delay with the 10ms/20ms configuration.

As the configuration turned into 10ms/10ms, this is to say equal sample time, rate transition does not need to behave like a unit delay :

An explicit unit delay is required in the loop. This case is handled if insertUD option is set to 1 :

With both options insertRT and insertUD set to 1, a new auto assemble leads to :

and updating this model by Ctrl+D does not lead to any error.

Remark : factory settings for insertRT and insertUD is 1.

Previous steps dealt with :

• • 2b redundant signals

  • 2c invalid function-call connection

Next steps 2d and 2e will use assemblies upon the empty architecture in the initial model.

Published with MATLAB® R2013a